1. Field
Various features pertain to passive thermal management systems, methods, and devices for heat dissipation of integrated circuits.
2. Background
Advances in the electrical performance of silicon integrated circuits (ICs) have resulted in ever shrinking integrated circuit dies. However, as the area of the IC dies grow smaller, the power consumption, and thus the power density across the die, increases. Increased power density across the die directly translates to an increase in the amount of heat produced by the die. As semiconductor junction temperatures go up, carrier mobility decreases, Which degrades the performance of CMOS transistors and other electrical components of the IC. For example, a sustained 10° C. to 15° C. increase in junction temperatures can result in a 50% reduction of the lifespan of the IC.
Moreover, increased die temperatures may be problematic from a consumer use standpoint for certain types of electronic devices. For example, handheld consumer devices, such as mobile phones, laptops, tablet computers, electronic readers, smartphones, etc., cannot exceed specific temperatures along surfaces that may be touched by a user in order to safeguard the user from burns. Cooling one or more ICs within the device helps reduce the surface touch temperature of the device and also increases the lifespan of the ICs. Generally, ICs may be cooled using either passive or active thermal management systems.
Active thermal management systems commonly utilize fans and/or pumps to perform cooling. However, such systems are not practical solutions for handheld consumer devices that feature small form factors for increased portability. For example, many of the aforementioned handheld consumer devices on the market have thin form factors that may be less than a centimeter thick. Accommodating a fan for an integrated circuit within such a device is not only undesirable, but may be impossible. As a result, small form factor devices currently use passive thermal management systems, as well as on-chip thermal sensors and control logic that control the IC's power using dynamic thermal management techniques. These dynamic thermal management techniques may purposely limit the operational frequency and performance of the integrated circuits in order to reduce radiant heat.
FIG. 1 illustrates a schematic view of a cross-section of a flip-chip IC package 100 coupled to a passive thermal management device, for example, a heat spreader 114 found in the prior art. The package 100 includes an integrated circuit die 102 having a front surface 104 (i.e., active surface) that is coupled to a package substrate 106 (e.g., laminate substrate, metal based substrate, such as copper based substrate, etc.) via a die attach and/or underfill adhesive 108. The hack surface 110 of the die 102 has a backside metallization layer 112 that couples to the heat spreader 114 with some thermal interface material (not shown) deposited there between. An epoxy and/or resin molding compound 118 may also be used to stabilize and protect the die 102. The combination package 100 and heat spreader 114 have a thickness tP1 (i.e., height) defined by the distance between the peak surface 124 of the heat spreader 114 and the bottom surface 122 of the substrate 106.
The heat spreader 114 preferably has a high thermal conductivity coefficient and fins 116 to help dissipate heat generated by the die 102. The heat spreader 114 is left exposed to the cooler ambient air surrounding it to dissipate heat. During operation, the die 102 heats up and transfers its heat energy to the heat spreader 114 via the backside metallization layer 112. The heat spreader 114 effectively “spreads out” the heat via its fins 116 and in effect transfers the heat energy to the ambient air surrounding it. In this fashion, the heat spreader 114 dissipates heat and lowers the operating temperature of the die 102. Larger heat spreaders having a larger cross sectional area and/or taller fins may be used to increase the heat dissipation performance of the heat spreader.
However, in high performance, small form factor devices, implementing the traditional heat spreader 114 as shown in FIG. 1 may not be practical or possible due to size constraints. FIG. 2 illustrates a schematic view of a cross-section of a flip-chip IC package 200 found in the prior art that does not include a heat spreader, and thus, has a thickness tP2 that is substantially less than the thickness tP1 shown in FIG. 1. Referring to FIG. 2, the package 200 includes an integrated circuit die 202 having a front surface 204 (i.e., active surface) that is coupled to a package substrate 206 via a die attach and/or underfill adhesive 208. An epoxy and/or resin molding compound 210 may also be used to stabilize and protect the die 202. The thickness tP2 is defined by the distance between the peak surface 212 (i.e., height) of the molding compound 210 and the bottom surface 214 of the substrate 206. The die 202 may have on-chip thermal sensors and control logic that help control the package's 200 power consumption by using dynamic thermal management techniques. However, these dynamic thermal management techniques may limit the operational frequency of the die 202 in order to keep the die 202 cool, thereby sacrificing performance of the package 200.
Thus, there is a need for improved passive thermal management systems, methods, and devices that adequately dissipate heat generated by an integrated circuit without negatively affecting the performance of the circuit.